View AD812ANZ_8981823.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ad812 a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. dual, current feedback low power op amp pin configuration 8-lead plastic mini-dip and soic out1 Cin1 +in1 v+ out2 Cin2 +in2 vC ad812 + + 4 3 2 1 5 6 7 8 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 1998 rev. b features two video amplifiers in one 8-lead soic package optimized for driving cables in video systems excellent video specifications (r l = 150 v ): gain flatness 0.1 db to 40 mhz 0.02% differential gain error 0.02 8 differential phase error low power operates on single +3 v supply 5.5 ma/amplifier max power supply current high speed 145 mhz unity gain bandwidth (3 db) 1600 v/ m s slew rate easy to use 50 ma output current output swing to 1 v of rails (150 v load) applications video line driver professional cameras video switchers special effects product description the ad812 is a low power, single supply, dual video amplifier. each of the amplifiers have 50 ma of output current and are optimized for driving one back-terminated video load (150 w ) each. each amplifier is a current feedback amplifier and fea- tures gain flatness of 0.1 db to 40 mhz while offering differen- tial gain and phase error of 0.02% and 0.02 . this makes the ad812 ideal for professional video electronics such as cameras and video switchers. C0.1 C0.6 1m 100m 10m C0.2 C0.3 C0.4 C0.5 0 0.1 normalized gain C db 100k frequency C hz 0.2 0.3 0.4 g = +2 r l = 150 v 5v 3v v s = 6 15v 6 5v figure 1. fine-scale gain flatness vs. frequency, gain = +2, r l = 150 w the ad812 offers low power of 4.0 ma per amplifier max (v s = +5 v) and can run on a single +3 v power supply. the outputs of each amplifier swing to within one volt of either supply rail to easily accommodate video signals of 1 v p-p. also, at gains of +2 the ad812 can swing 3 v p-p on a single +5 v power sup- ply. all this is offered in a small 8-lead plastic dip or 8-lead soic package. these features make this dual amplifier ideal for portable and battery powered applications where size and power is critical. the outstanding bandwidth of 145 mhz along with 1600 v/ m s of slew rate make the ad812 useful in many general purpose high speed applications where a single +5 v or dual power sup- plies up to 15 v are available. the ad812 is available in the industrial temperature range of C40 c to +85 c. 15 0.06 0.02 6 0.04 5 0.08 14 12 11 10 13 9 8 7 supply voltage C 6 volts differential phase C degrees 0.06 0.02 0.04 differential gain C % 0 differential gain differential phase figure 2. differential gain and phase vs. supply voltage, gain = +2, r l = 150 w
model ad812a conditions v s min typ max units dynamic performance C3 db bandwidth g = +2, no peaking 5 v 50 65 mhz 15 v 75 100 mhz gain = +1 15 v 100 145 mhz bandwidth for 0.1 db flatness g = +2 5 v 20 30 mhz 15 v 25 40 mhz slew rate 1 g = +2, r l = 1 k w 5 v 275 425 v/ m s 20 v step 15 v 1400 1600 v/ m s g = C1, r l = 1 k w 5 v 250 v/ m s 15 v 600 v/ m s settling time to 0.1% g = C1, r l = 1 k w v o = 3 v step 5 v 50 ns v o = 10 v step 15 v 40 ns noise/harmonic performance total harmonic distortion f c = 1 mhz, r l = 1 k w 15 v C90 dbc input voltage noise f = 10 khz 5 v, 15 v 3.5 nv/ ? hz input current noise f = 10 khz, +in 5 v, 15 v 1.5 pa/ ? hz f = 10 khz, Cin 5 v, 15 v 18 pa/ ? hz differential gain error ntsc, g = +2, r l = 150 w 5 v 0.05 0.1 % 15 v 0.02 0.06 % differential phase error 5 v 0.07 0.15 degrees 15 v 0.02 0.06 degrees dc performance input offset voltage 5 v, 15 v 2 5 mv t min Ct max 12 mv offset drift 5 v, 15 v 15 m v/ c Cinput bias current 5 v, 15 v 7 25 m a t min Ct max 38 m a +input bias current 5 v, 15 v 0.3 1.5 m a t min Ct max 2.0 m a open-loop voltage gain v o = 2.5 v, r l = 150 w 5 v 68 76 db t min Ct max 69 db v o = 10 v, r l = 1 k w 15 v 76 82 db t min Ct max 75 db open-loop transresistance v o = 2.5 v, r l = 150 w 5 v 350 550 k w t min Ct max 270 k w v o = 10 v, r l = 1 k w 15 v 450 800 k w t min Ct max 370 k w input characteristics input resistance +input 15 v 15 m w Cinput 65 w input capacitance +input 1.7 pf input common mode 5 v 4.0 v voltage range 15 v 13.5 v common-mode rejection ratio input offset voltage v cm = 2.5 v 5 v 51 58 db Cinput current 23.0 m a/v +input current 0.07 0.15 m a/v input offset voltage v cm = 12 v 15 v 55 60 db Cinput current 1.5 3.3 m a/v +input current 0.05 0.15 m a/v (@ t a = +25 8 c, r l = 150 v , unless otherwise noted) dual supply ad812Cspecifications C2C rev. b
model ad812a conditions v s min typ max units output characteristics output voltage swing r l = 150 w , t min Ct max 5 v 3.5 3.8 v r l = 1 k w , t min Ct max 15 v 13.6 14.0 v output current 5 v 30 40 ma 15 v 40 50 ma short circuit current g = +2, r f = 715 w 15 v 100 ma v in = 2 v output resistance open-loop 15 v 15 w matching characteristics dynamic crosstalk g = +2, f = 5 mhz 5 v, 15 v C75 db gain flatness match g = +2, f = 40 mhz 15 v 0.1 db dc input offset voltage t min Ct max 5 v, 15 v 0.5 3.6 mv Cinput bias current t min Ct max 5 v, 15 v 2 25 m a power supply operating range 1.2 18 v quiescent current per amplifier 5 v 3.5 4.0 ma 15 v 4.5 5.5 ma t min Ct max 15 v 6.0 ma power supply rejection ratio input offset voltage v s = 1.5 v to 15 v 70 80 db Cinput current 0.3 0.6 m a/v +input current 0.005 0.05 m a/v notes 1 slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. specifications subject to change without notice. single supply model ad812a conditions v s min typ max units dynamic performance C3 db bandwidth g = +2, no peaking +5 v 35 50 mhz +3 v 30 40 mhz bandwidth for 0.1 db flatness g = +2 +5 v 13 20 mhz +3 v 10 18 mhz slew rate 1 g = +2, r l = 1 k w +5 v 125 v/ m s +3 v 60 v/ m s noise/harmonic performance input voltage noise f = 10 khz +5 v, +3 v 3.5 nv/ ? hz input current noise f = 10 khz, +in +5 v, +3 v 1.5 pa/ ? hz f = 10 khz, Cin +5 v, +3 v 18 pa/ ? hz differential gain error 2 ntsc, g = +2, r l = 150 w +5 v 0.07 % g = +1 +3 v 0.15 % differential phase error 2 g = +2 +5 v 0.06 degrees g = +1 +3 v 0.15 degrees ad812 rev. b C3C (@ t a = +25 8 c, r l = 150 v , unless otherwise noted)
ad812a model conditions v s min typ max units dc performance input offset voltage +5 v, +3 v 1.5 4.5 mv t min Ct max 7.0 mv offset drift +5 v, +3 v 7 m v/ c Cinput bias current +5 v, +3 v 2 20 m a t min Ct max 30 m a +input bias current +5 v, +3 v 0.2 1.5 m a t min Ct max 2.0 m a open-loop voltage gain v o = +2.5 v p-p +5 v 67 73 db v o = +0.7 v p-p +3 v 70 db open-loop transresistance v o = +2.5 v p-p +5 v 250 400 k w v o = +0.7 v p-p +3 v 300 k w input characteristics input resistance +input +5 v 15 m w Cinput +5 v 90 w input capacitance +input 2 pf input common mode +5 v 1.0 4.0 v voltage range +3 v 1.0 2.0 v common-mode rejection ratio input offset voltage v cm = 1.25 v to 3.75 v +5 v 52 55 db Cinput current 35.5 m a/v +input current 0.1 0.2 m a/v input offset voltage v cm = 1 v to 2 v +3 v 52 db Cinput current 3.5 m a/v +input current 0.1 m a/v output characteristics output voltage swing p-p r l = 1 k w , t min Ct max +5 v 3.0 3.2 v p-p r l = 150 w , t min Ct max +5 v 2.8 3.1 v p-p +3 v 1.0 1.3 v p-p output current +5 v 20 30 ma +3 v 15 25 ma short circuit current g = +2, r f = 715 w +5 v 40 ma v in = 1 v matching characteristics dynamic crosstalk g = +2, f = 5 mhz +5 v, +3 v C72 db gain flatness match g = +2, f = 20 mhz +5 v, +3 v 0.1 db dc input offset voltage t min Ct max +5 v, +3 v 0.5 3.5 mv Cinput bias current t min Ct max +5 v, +3 v 2 25 m a power supply operating range 2.4 36 v quiescent current per amplifier +5 v 3.2 4.0 ma +3 v 3.0 3.5 ma t min Ct max +5 v 4.5 ma power supply rejection ratio input offset voltage v s = +3 v to +30 v 70 80 db Cinput current 0.3 0.6 m a/v +input current 0.005 0.05 m a/v transistor count 56 notes 1 slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. 2 single supply differential gain and phase are measured with the ac coupled circuit of figure 53. specifications subject to change without notice. ad812Cspecifications single supply (continued) rev. b C4C
ad812 C5C rev. b maximum power dissipation the maximum power that can be safely dissipated by the ad812 is limited by the associated rise in junction temperature. the maximum safe junction temperature for the plastic encap- sulated parts is determined by the glass transition temperature of the plastic, about 150 c. exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. exceeding a junction temperature of 175 c for an extended period can result in device failure. while the ad812 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction tem- perature (150 degrees) is not exceeded under all conditions. to ensure proper operation, it is important to observe the derating curves. it must also be noted that in high (noninverting) gain configura- tions (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may result in a significant power dissipation in the input stage. this power must be included when computing the junction tempera- ture rise due to total internal power. maximum power dissipation C watts ambient temperature C 8 c 2.0 1.5 0 C50 90 C40 C30 C20 C10 0 10 20 30 50 60 70 80 40 1.0 0.5 8-lead soic package 8-lead mini-dip package t j = +150 8 c figure 3. plot of maximum power dissipation vs. temperature absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation 2 plastic (n) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 watts small outline (r) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 watts input voltage (common mode) . . . . . . . . . . . . . . . . . . . . v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . . 1.2 v output short circuit duration . . . . . . . . . . . . . . . . . . . . . . observe power derating curves storage temperature range n, r . . . . . . . . . C65 c to +125 c operating temperature range . . . . . . . . . . . . C40 c to +85 c lead temperature range (soldering, 10 sec) . . . . . . . +300 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 specification is for device in free air: 8-lead plastic package: q ja = 90 c/watt; 8-lead soic package: q ja = 150 c/watt. ordering guide temperature package package model range description option ad812an C40 c to +85 c 8-lead plastic dip n-8 ad812ar C40 c to +85 c 8-lead plastic soic so-8 ad812ar-reel 13" reel ad812ar-reel7 7" reel metalization photo dimensions shown in inches and (mm). v+ 8 out2 7 Cin2 6 2 Cin1 3 +in1 4 vC 1 out1 5 +in2 4 vC 0.0783 (1.99) 0.0539 (1.37) caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad812 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device
20 0 020 15 5 5 10 10 15 supply voltage C 6 volts common-mode voltage range C 6 volts figure 4. input common-mode voltage range vs. supply voltage 20 0 020 15 5 5 10 10 15 supply voltage C 6 volts output voltage C v p-p r l = 150 v no load figure 5. output voltage swing vs. supply voltage 30 15 0 10 100 10k 1k 10 5 20 25 load resistance C v output voltage C volts p-p 6 15v supply 6 5v supply figure 6. output voltage swing vs. load resistance 16 4 10 6 8 14 12 140 C40 C60 120 80 60 40 100 20 0 C20 junction temperature C 8 c total supply current C ma v s = 6 15v v s = 6 5v figure 7. total supply current vs. junction temperature 10 5 8 6 7 9 16 2 0 14 12 10 8 6 4 supply voltage C 6 volts total supply current C ma t a = +25 c figure 8. total supply current vs. supply voltage 25 C25 C10 C20 C15 5 C5 0 10 15 20 C60 140 C40 120 100 80 60 40 20 0 C20 input bias current C m a junction temperature C 8 c Ci b , v s = 6 15v +i b , v s = 6 5v, 6 15v Ci b , v s = 6 5v figure 9. input bias current vs. junction temperature ad812Ctypical performance characteristics rev. b C6C
ad812 C7C rev. b 4 C16 C10 C14 C12 C4 C8 C6 C2 0 2 140 C40 C60 120 100 80 60 40 20 0 C20 input offset voltage C mv junction temperature C 8 c v s = 6 15v v s = 6 5v figure 10. input offset voltage vs. junction temperature 160 40 100 60 80 140 120 140 C40 C60 120 80 60 40 100 20 0 C20 junction temperature C 8 c short circuit current C ma sink v s = 6 15v source figure 11. short circuit current vs. junction temperature 80 20 50 30 40 70 60 140 C40 C60 120 80 60 40 100 20 0 C20 junction temperature C 8 c output current C ma v s = 6 15v v s = 6 5v figure 12. linear output current vs. junction temperature 70 20 50 30 40 60 20 5 0 15 10 supply voltage C 6 volts output current C ma figure 13. linear output current vs. supply voltage 100k 100m 10m 1m 10k 0.01 1k 10 1 0.1 100 frequency C hz closed-loop output resistance C v 6 15v s 6 5v s g = +2 figure 14. closed-loop output resistance vs. frequency 30 15 0 100k 1m 100m 10m 10 5 20 25 frequency C hz output voltage C v p-p v s = 6 15v v s = 6 5v r l = 1k v figure 15. large signal frequency response
ad812 rev. b C8C 100 10 1 10 100 100k 10k 1k frequency C hz voltage noise C nv/ hz 100 10 1 current noise C pa/ hz inverting input current noise voltage noise noninverting input current noise figure 16. input current and voltage noise vs. frequency 10k 100k 100m 10m 1m frequency C hz 90 60 50 70 80 20 10 30 40 common-mode rejection C db 681 v 681 v v out v in 681 v 681 v v s = 6 15v v s = 3v figure 17. common-mode rejection vs. frequency frequency C hz power supply rejection C db 80 40 0 10k 100k 100m 10m 1m 20 60 50 30 10 70 6 15v 6 1.5v figure 18. power supply rejection vs. frequency 10k 100k 100m 10m 1m frequency C hz 100 40 120 60 80 transimpedance C db 0 C45 C90 C135 C180 phase C degrees phase gain v s = 3v v s = 6 15v v s = 3v v s = 6 15v figure 19. open-loop transimpedance vs. frequency (relative to 1 w ) C30 frequency C hz harmonic distortion C dbc 1k C130 10k 100k 1m 10m 100m C70 C50 C110 C90 g = +2 v s = 2v p-p v s = 6 15v ; r l = 1k v v s = 6 5v ; r l = 150 v v s = 6 5v 2 nd harmonic 3 rd harmonic 2 nd 3 rd v s = 6 15v figure 20. harmonic distortion vs. frequency settling time C ns output swing from 6 v to 0 10 C10 60 C4 C8 C6 20 2 C2 0 4 6 8 40 30 50 0.1% gain = C1 v s = 6 15v 1% 0.025% figure 21. output swing and error vs. settling time
ad812 C9C rev. b 1400 0 10 600 200 1 400 0 1200 800 1000 9 8 7 6 5 4 3 2 output step size C vp-p slew rate C v/ m s v s = 6 15v r l = 500 v g = +1 g = +2 g = +10 g = C1 figure 22. slew rate vs. output step size 10 100 0% 2v 50ns 2v v in v out 90 figure 23. large signal pulse response, gain = +1, (r f = 750 w , r l = 150 w , v s = 5 v) C1 C6 10 100 C2 C3 C4 C5 0 1 closed-loop gain C db 1 frequency C mhz 1000 0 C90 C180 C270 phase shift C degrees 6 5v 5v g = +1 r l = 150 v 5v 3v phase gain v s = 6 15v 6 5v v s = 6 15v 3v figure 24. closed-loop gain and phase vs. frequency, g = +1 1400 0 15.0 600 200 1.5 400 0 1200 800 1000 13.5 12.0 10.5 9.0 7.5 6.0 4.5 3.0 supply voltage C 6 volts slew rate C v/ m s g = +2 g = +10 g = C1 g = +1 figure 25. maximum slew rate vs. supply voltage 10 90 100 0% 500mv 20ns v in v out 500mv figure 26. small signal pulse response, gain = +1, (r f = 750 w , r l = 150 w , v s = 5 v) 200 0 20 60 20 2 40 0 120 80 100 140 160 180 18 16 14 12 10 8 6 4 supply voltage C 6 volts C3db bandwidth C mhz g = +1 r l = 150 v peaking 1db peaking 0.2db r f = 750 v r f = 866 v figure 27. C3 db bandwidth vs. supply voltage, g = +1
ad812 rev. b C10C 10 90 100 0% 500mv 50ns 5v v in v out figure 28. large signal pulse response, gain = +10, (r f = 357 w , r l = 500 w , v s = 15 v) 1 10 1000 100 frequency C mhz C1 C6 1 0 C2 C3 C4 C5 closed-loop gain (normalized) C db 0 C90 C180 C270 phase shift C degrees 3v 5v 5v 6 5v 3v 6 5v phase gain v s = 6 15v g = +10 r l = 150 v v s = 6 15v figure 29. closed-loop gain and phase vs. frequency, gain = +10, r l = 150 w 216 14 12 10 8 6 4 supply voltage C 6 volts C3db bandwidth C mhz 30 20 60 40 50 70 80 90 100 10 0 01820 g = +10 r l = 150 v peaking 1db r f = 154 v r f = 357 v r f = 649 v figure 30. C3 db bandwidth vs. supply voltage, gain = +10, r l = 150 w 10 90 100 0% 20ns 500mv 50mv v in v out figure 31. small signal pulse response, gain = +10, (r f = 357 w , r l = 150 w , v s = 5 v) 1 10 1000 100 frequency C mhz C1 C6 1 0 C2 C3 C4 C5 closed-loop gain (normalized) C db 3v 5v 0 C90 C180 C270 phase shift C degrees C360 phase gain 3v 5v v s = 6 15v g = +10 r l = 1k v 6 5v v s = 6 15v 6 5v figure 32. closed-loop gain and phase vs. frequency, gain = +10, r l = 1 k w 216 14 12 10 8 6 4 supply voltage C 6 volts C3db bandwidth C mhz 30 20 60 40 50 70 80 90 01820 100 110 10 g = +10 r l = 1k v r f = 154 v r f = 357 v r f = 649 v figure 33. C3 db bandwidth vs. supply voltage, gain = +10, r l = 1 k w
ad812 C11C rev. b 10 90 100 0% 50ns 2v v in v out 2v figure 34. large signal pulse response, gain = C1, (r f = 750 w , r l = 150 w , v s = 5 v) C1 C6 1 10 1000 100 C2 C3 C4 C5 0 1 C270 C180 C90 0 frequency C mhz closed-loop gain (normalized) C db g = C1 r l = 150 v phase shift C degrees phase gain v s = 6 15v 6 5v 5v 3v v s = 6 15v 6 5v 5v 3v figure 35. closed-loop gain and phase vs. frequency, gain = C1, r l = 150 w 130 30 20 60 40 2 50 0 90 70 80 100 110 120 18 16 14 12 10 8 6 4 C3db bandwidth C mhz supply voltage C 6 volts g = C1 r l = 150 v peaking # 1.0db r f = 681 v r f = 715 v peaking # 0.2db figure 36. C3 db bandwidth vs. supply voltage, gain = C1, r l = 150 w 10 90 100 0% 500mv 20ns 500mv v in v out figure 37. small signal pulse response, gain = C1, (r f = 750 w , r l = 150 w , v s = 5 v) C1 C6 1 10 1000 100 C2 C3 C4 C5 0 1 C270 C180 C90 0 frequency C mhz closed-loop gain (normalized) C db g = C10 r l = 1k v 6 5v 5v 3v phase v s = 6 15v gain 5v 3v 6 5v v s = 6 15v phase shift C degrees figure 38. closed-loop gain and phase vs. frequency, gain = C10, r l = 1 k w 100 0 20 30 10 2 20 0 60 40 50 70 80 90 18 16 14 12 10 8 6 4 C3db bandwidth C mhz supply voltage C 6 volts g = C10 r l = 1k v r f = 357 v r f = 649 v r f = 154 v figure 39. C3 db bandwidth vs. supply voltage, gain = C10, r l = 1 k w
ad812 rev. b C12C general considerations the ad812 is a wide bandwidth, dual video amplifier which offers a high level of performance on less than 5.5 ma per am- plifier of quiescent supply current. it is designed to offer out- standing performance at closed-loop inverting or noninverting gains of one or greater. built on a low cost, complementary bipolar process, and achiev- ing bandwidth in excess of 100 mhz, differential gain and phase errors of better than 0.1% and 0.1 (into 150 w ), and output current greater than 40 ma, the ad812 is an exceptionally efficient video amplifier. using a conventional current feedback architecture, its high performance is achieved through careful attention to design details. choice of feedback and gain resistors because it is a current feedback amplifier, the closed-loop band- width of the ad812 depends on the value of the feedback resis- tor. the bandwidth also depends on the supply voltage. in addition, attenuation of the open-loop response when driving load resistors less than about 250 w will affect the bandwidth. table i contains data showing typical bandwidths at different supply voltages for some useful closed-loop gains when driving a load of 150 w . (bandwidths will be about 20% greater for load resistances above a few hundred ohms.) the choice of feedback resistor is not critical unless it is impor- tant to maintain the widest, flattest frequency response. the resistors recommended in the table are those (metal film values) that will result in the widest 0.1 db bandwidth. in those appli- cations where the best control of the bandwidth is desired, 1% metal film resistors are adequate. wider bandwidths can be attained by reducing the magnitude of the feedback resistor (at the expense of increased peaking), while peaking can be reduced by increasing the magnitude of the feedback resistor. table i. C3 db bandwidth vs. closed-loop gain and feedback resistor (r l = 150 w ) v s (v) gain r f ( v ) bw (mhz) 15 +1 866 145 +2 715 100 +10 357 65 C1 715 100 C10 357 60 5 +1 750 90 +2 681 65 +10 154 45 C1 715 70 C10 154 45 +5 +1 750 60 +2 681 50 +10 154 35 C1 715 50 C10 154 35 +3 +1 750 50 +2 681 40 +10 154 30 C1 715 40 C10 154 25 to estimate the C3 db bandwidth for closed-loop gains or feed- back resistors not listed in the above table, the following two pole model for the ad812 many be used: a g s rgrc f s r gr c cl fint fint = + () ? ? ++ () + 2 2 2 1 p where: a cl = closed-loop gain g = 1 + r f /r g r in = input resistance of the inverting input c t = transcapacitance, which forms the open-loop dominant pole with the tranresistance r f = feedback resistor r g = gain resistor f 2 = frequency of second (nondominant) pole s = 2 p j f appropriate values for the model parameters at different supply voltages are listed in table ii. reasonable approximations for these values at supply voltages not found in the table can be obtained by a simple linear interpolation between those tabu- lated values which bracket the desired condition. table ii. two-pole model parameters at various supply voltages v s r in ( v )c t (pf) f 2 (mhz) 15 85 2.5 150 5 90 3.8 125 +5 105 4.8 105 +3 115 5.5 95 as discussed in many amplifier and electronics textbooks (such as roberges operational amplifiers: theory and practice ), the C3 db bandwidth for the 2-pole model can be obtained as: f 3 = f n [1 C 2 d 2 + (2 C 4 d 2 + 4 d 4 ) 1/2 ] 1/2 where: f f rgrc n fint = + () ? ? 2 12 / and: d = (1/2) [ f 2 ( r f + gr in ) c t ] 1/2 this model will predict C3 db bandwidth within about 10 to 15% of the correct value when the load is 150 w . however, it is not an accurate enough to predict either the phase behavior or the frequency response peaking of the ad812. printed circuit board layout guidelines as with all wideband amplifiers, printed circuit board parasitics can affect the overall closed-loop performance. most important for controlling the 0.1 db bandwidth are stray capacitances at the output and inverting input nodes. increasing the space between signal lines and ground plane will minimize the coupling. also, signal lines connecting the feedback and gain resistors should be kept short enough that their associated inductance does not cause high frequency gain errors.
ad812 C13C rev. b power supply bypassing adequate power supply bypassing can be very important when optimizing the performance of high speed circuits. inductance in the supply leads can (for example) contribute to resonant circuits that produce peaking in the amplifiers response. in addition, if large current transients must be delivered to a load, then large (greater than 1 m f) bypass capacitors are required to produce the best settling time and lowest distortion. although 0.1 m f capacitors may be adequate in some applications, more elaborate bypassing is required in other cases. when multiple bypass capacitors are connected in parallel, it is important to be sure that the capacitors themselves do not form resonant circuits. a small (say 5 w ) resistor may be required in series with one of the capacitors to minimize this possibility. as discussed below, power supply bypassing can have a signifi- cant impact on crosstalk performance. achieving low crosstalk measured crosstalk from the output of amplifier 2 to the input of amplifier 1 of the ad812 is shown in figure 40. the crosstalk from the output of amplifier 1 to the input of amplifier 2 is a few db better than this due to the additional distance between criti- cal signal nodes. a carefully laid-out pc board should be able to achieve the level of crosstalk shown in the figure. the most significant contribu- tors to difficulty in achieving low crosstalk are inadequate power supply bypassing, overlapped input and/or output signal paths, and capacitive coupling between critical nodes. the bypass capacitors must be connected to the ground plane at a point close to and between the ground reference points for the two loads. (the bypass of the negative power supply is particu- larly important in this regard.) there are two amplifiers in the package, and low impedance signal return paths must be pro- vided for each load. (using a parallel combination of 1 m f, 0.1 m f, and 0.01 m f bypass capacitors will help to achieve opti- mal crosstalk.) C10 C60 C110 1m 100m 10m C70 C80 C90 C100 C50 C40 C30 C20 crosstalk C db 100k frequency C hz r l = 150 v figure 40. crosstalk vs. frequency the input and output signal return paths must also be kept from overlapping. since ground connections are not of perfectly zero impedance, current in one ground return path can produce a voltage drop in another ground return path if they are allowed to overlap. electric field coupling external to (and across) the package can be reduced by arranging for a narrow strip of ground plane to be run between the pins (parallel to the pin rows). doing this on both sides of the board can reduce the high frequency crosstalk by about 5 db or 6 db. driving capacitive loads when used with the appropriate output series resistor, any load capacitance can be driven without peaking or oscillation. in most cases, less than 50 w is all that is needed to achieve an extremely flat frequency response. as illustrated in figure 44, the ad812 can be very attractive for driving largely capacitive loads. in this case, the ad812s high output short circuit current allows for a 150 v/ m s slew rate when driving a 510 pf capacitor. ad812 8 4 r g r f v in r t v o r l c l r s +v s 0.1 m f 1.0 m f 0.1 m f 1.0 m f Cv s figure 41. circuit for driving a capacitive load 1 10 1000 100 frequency C mhz 6 9 3 0 C3 closed-loop gain C db 12 C6 v s = 6 5v g = +2 r f = 750 v r l = 1k v c l = 10pf r s = 0 r s = 30 v r s = 50 v figure 42. response to a small load capacitor at 5 v
ad812 rev. b C14C 1 10 1000 100 frequency C mhz 6 9 3 0 C3 closed-loop gain C db 12 C6 C9 v s = 6 15v g = +2 r f = 750 v r l = 1k v c l = 510pf, r s = 15 v c l = 150pf, r s = 30 v figure 43. response to large load capacitor, v s = 15 v 10 100 0% 100ns 5v 5v v in v out 90 figure 44. pulse response of circuit of figure 41 with c l = 510 pf, r l = 1 k w , r f = r g = 715 w , r s = 15 w overload recovery there are three important overload conditions to consider. they are due to input common mode voltage overdrive, input current overdrive, and output voltage overdrive. when the amplifier is configured for low closed-loop gains, and its input common-mode voltage range is exceeded, the recovery time will be very fast, typically under 10 ns. when configured for a higher gain, and overloaded at the output, the recovery time will also be short. for example, in a gain of +10, with 6 db of input overdrive, the recovery time of the ad812 is about 10 ns. 10 90 100 0% 2v 1v 50ns v in v out figure 45. 6 db overload recovery; g = 10, r l = 500 w , v s = 5 v in the case of high gains with very high levels of input overdrive, a longer recovery time may occur. for example, if the input common-mode voltage range is exceeded in a gain of +10, the recovery time will be on the order of 100 ns. this is primarily due to current overloading of the input stage. as noted in the warning under maximum power dissipation, a high level of input overdrive in a high noninverting gain circuit can result in a large current flow in the input stage. for differ- ential input voltages of less than about 1.25 v, this will be inter- nally limited to less than 20 ma ( decreasing with supply voltage). for input overdrives which result in higher differential input voltages, power dissipation in the input stage must be consid- ered. it is recommended that external diode clamps be used in cases where the differential input voltage is expected to exceed 1.25 v. high performance video line driver at a gain of +2, the ad812 makes an excellent driver for a back- terminated 75 w video line. low differential gain and phase errors and wide 0.1 db bandwidth can be realized over a wide range of power supply voltage. outstanding gain and group delay matching are also attainable over the full operating supply voltage range. ad812 8 4 r g r f v in 75 v v out 75 v +v s 0.1 m f 0.1 m f Cv s 75 v cable 75 v cable 75 v figure 46. gain of +2 video line driver (r f = r g from table i)
ad812 C15C rev. b 1 10 1000 100 frequency Cmhz C1 C6 1 0 C2 C3 C4 C5 closed-loop gain C db 90 0 C90 C180 C270 phase shift C degrees 3v 5v phase gain g = +2 r l = 150 v v s = 6 15v 6 5v v s = 6 15v 6 5v 5v 3v figure 47. closed-loop gain and phase vs. frequency for the line driver 120 20 20 50 30 2 40 0 80 60 70 90 100 110 18 16 14 12 10 8 6 4 supply voltage C 6 volts C3db bandwidth C mhz g = +2 r l = 150 v r f = 590 v r f = 715 v r f = 750 v peaking # 1db no peaking figure 48. C3 db bandwidth vs. supply voltage, gain = +2, r l = 150 w 15 0.06 0.02 6 0.04 5 0.08 14 12 11 10 13 9 8 7 supply voltage C 6 volts differential phase C degrees 0.06 0.02 0.04 differential gain C % 0 differential gain differential phase figure 49. differential gain and phase vs. supply voltage, gain = +2, r l = 150 w C0.1 C0.6 1m 100m 10m C0.2 C0.3 C0.4 C0.5 0 0.1 normalized gain C db 100k frequency C hz 0.2 0.3 0.4 g = +2 r l = 150 v 5v 3v v s = 6 15v 6 5v figure 50. fine-scale gain flatness vs. frequency, gain = +2, r l = 150 w 1.0 0 C1.0 10 100 C0.2 C0.4 C0.6 C0.8 0.2 0.4 0.6 0.8 gain match C db 1 frequency C mhz 1000 v s = 3v r f = 681 v g = +2 r l = 150 v v s = 6 15v r f = 715 v figure 51. closed-loop gain matching vs. frequency, gain = +2, r l = 150 w 0 1m 10m C0.2 C0.4 0.2 0.4 group delay C ns 100k frequency C hz 100m 4 2 6 8 delay delay matching 0 3v 5v 6 5v 6 15v v s = 3v to 6 15v figure 52. group delay and group delay matching vs. frequency, g = +2, r l = 150 w
ad812 rev. b C16C operation using a single supply the ad812 will operate with total supply voltages from 36 v down to 2.4 v. with proper biasing (see figure 53), it can be an outstanding single supply video amplifier. since the input and output voltage ranges extend to within 1 volt of the supply rails, it will handle a 1.3 v p-p signal on a single 3.3 v supply, or a 3 v p-p signal on a single 5 v supply. the small signal, 0.1 db bandwidths will exceed 10 mhz in either case, and the large signal bandwidths will exceed 6 mhz. the capacitively coupled cable driver in figure 53 will achieve outstanding differential gain and phase errors of 0.07% and 0.06 degrees respectively on a single 5 v supply. resistor r2, in this circuit, is selected to optimize the differential gain and phase by operating the amplifier in its most linear region. to optimize the circuit for a 3 v supply, a value of 8 k w is recommended for r2. ad812 8 4 v in r2 11.8k v v out 75 v 75 v +v s r3 1k v 75 v cable r1 9k v c1 2 m f c3 30 m f 649 v 649 v c out 47 m f c2 1 m f figure 53. biasing for single supply operation 8-lead plastic dip (n-8) 8 14 5 pin 1 seating plane 0.060 (1.52) 0.015 (0.38) 0.165 6 0.01 (4.19 6 0.25) 0.10 (2.54) bsc 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 0.39 (9.91) 0.25 (6.35) 0.125 (3.18) min 0.018 6 0.003 (0.46 +0.08) 0.033 (0.84) nom 8-lead plastic soic (so-8) 0.1968 (5.00) 0.1890 (4.80) 85 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19)

▲Up To Search▲

Price & Availability of AD812ANZ

	To Download AD812ANZ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .